User:Howard Landman

Howard A. Landman (born Feb 3 1952) is an American engineer, mathematician, writer, and visual artist. He was a co-designer of several major integrated circuits, including the Berkeley RISC I (first RISC microprocessor), HaL SPARC64 (first 64-bit SPARC), and the Emotion Engine chip for the Sony PlayStation 2 (first commercial 128-bit microprocessor). As a mathematician, he has published papers in combinatorial game theory including a lengthy study of eyespace values in the game of Go, co-designed the VEST stream cipher, and made contributions to the Online Encyclopedia Of Integer Sequences. His non-technical writing includes poetry, over 150 poetry translations (mostly of R. M. Rilke and G. A. Becquer), and songs. His visual work has included photography, electronic (LED) jewelry, and writing flow fields for the G-Force music visualizer by SoundSpectrum (often derived from fractals or chaos theory); he has also made occasional forays into live performance, from the 1968-69 light show group Ocean Of See to 2010-12 VJ stints with electronica band The Acidophiles. He currently resides in Fort Collins, Colorado.

Publications

[Note: some are co-authored]

Citation list at Google Scholar

"Designing an Advanced Gaming Physics Chip", Information Quarterly v.6 #3 pp. 38-40, Nov. 2007

"Rebuttal of overtaking VEST", Mar. 2007

"Implementing BIST and Repair in a Memory Intensive Design", MUSIC India, Nov. 2006

"VEST Hardware-Dedicated Stream Ciphers" (PDF), June 2005

"Stability Analysis of a Complete RTL-to-GDS2 Design Flow", Magma Fusion Users Group, Sept. 2003

"How Predictable Is Your Design Flow?", web seminar Apr. 30 2003

"A High Bandwidth Superscalar Microprocessor for Multimedia Applications", ISSCC 1999

"Visualizing the Behavior of Logic Synthesis Algorithms" (PDF), 1998 Synopsys User's Group.

"Paths to Nanotechnology", chapter 6 in Krummenacker & Lewis (eds.), Prospects in Nanotechnology: Toward Molecular Manufacturing, Wiley 1995

U.S. Patent 5,191,541: Method and Apparatus to Improve Static Path Analysis of Digital Circuits, March 2, 1993

"Low-level Logic Synthesis", IDEA '91 Conference

"Design Environments at Sun: Logic Synthesis", Sun User's Group 89

"Logic Synthesis at Sun", CompCon Spring 89

"OPUSI: An Optical Digital Position Sensor", ICCAD 83 Digest of Technical Papers, September 1983

"Integrating Foundry Processes into the Engineering Workstation", Electro/83 Professional Program, April 1983

Automatic Layout of Optimized PLA Structures, Masters Thesis, U.C. Berkeley, 1982.

"PLA Tools" in Berkeley VLSI Tools, Bob Mayo (ed.), Computer Science Division, U.C. Berkeley 1982

"A RISCy Approach to VLSI" (PDF), VLSI Design, 4th quarter 1981.

"VLSI Implementations of a Reduced Instruction Set Computer", CMU Conference on VLSI Systems and Computations, 1981