Talk:Clock signal

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Merger

I propose that clock rate be merged with this article. There is no reason to have a separate article on something that ought to be a paragraph (at best) in this one. -- uberpenguin @ 2006-03-26 01:43Z

Help me understand how the Canal Lock fits into this article??

I agree with this suggestion, there is a tendency for articles on digital computers and on digital circuits to be created independently, when the concept they are discussing is the same. This is a classic example, where the computer article is rather less general than the electronics article, and both would benefit from the merger.Sangwine 11:08, 10 May 2006 (UTC)[reply]


I'm not an expert in computer jargon and when looking at specs "clock rate" was useful. "Clock signal" I wouldn't have guessed at in a million years. So I'm not always in favour of combining articles if it makes it hard to get the quick definition of "clock rate" that I needed as a novice. I don't support the merger, but if written properly I don't object to it either.


I also don't think it should be merged. The thing is that merging it would be correct in addressing computer pros but the talk about square waves in the "clock signal" article was not the work of a novice, whereas the "clock rate" page was easily understandable. But again if it were written properly, no problem.

As an electronics graduate 20 years ago, and a computer professional now, I'd say these warrant seperate articles. Clock rate is very widely understood as "how fast is my chip" whereas clock signal much lower-level - as reflacted in the 2 articles. I'd say cross-reference but don't merge.

I agree with the last statement, clock rate is a sub-topic of clock signal, and e.g. it's mentioned deep down in the article. Since the suggestion to merge has been made nearly a year a ago and nobody found a feasible way to merge, I drop the merge suggestion and refer to clock rate where it's mentioned in the clock signal article.--NoSoftwarePatents 11:20, 19 February 2007 (UTC)[reply]

Except that mostly isn't true. Clock rate can really only be used for comparing different grades of the same processor. For exactly the reasons given in this article, you can't directly compare different processors by clock rate alone. Gah4 (talk) 02:01, 26 October 2017 (UTC)[reply]

90 - 360

In some early microprocessors such as the National Semiconductor IMP-16 family, a multi-phase clock was used. In the case of the IMP-16, the clock had four phases, each 90 degrees apart, in order to synchronize the operations of the processor core and its peripherals. Most modern microprocessors and microcontrollers use a single-phase clock, however.

A single-phase clock only has one state to be in, effectively making it a constant signal. Isn't it better to talk of a two-phase clock? --Abdull 09:04, 21 November 2006 (UTC)[reply]

In synchronous circuits, a "two-phase clock" refers to clock signals distributed on 2 wires. Traditionally one wire is called "phase 1" or "phi1", the other wire carries the "phase 2" or "phi2" signal [1] [2] [3] [4] . A "4-phase clock" has clock signals distributed on 4 wires ( [5], four phase logic ). Most modern synchronous circuits do, in fact, use what is called a "single phase clock" -- in other words, they transmit all clock signals on 1 wire. Please help us make this article less misleading and confusing. --75.37.227.177 04:48, 31 July 2007 (UTC)[reply]

Distribution

I suggest merging clock distribution network as a sub-heading into this clock signal article. There seems to be a lot of overlap in content between the two articles, apparently because they are very closely related concepts. --DavidCary (talk) 18:06, 19 August 2011 (UTC)[reply]

Prefer not to merge

Having done research on clock distribution networks, I strongly prefer this page to be separate. The main reason is that the optimization of clock distribution networks is a field of its own, and is not fully understood even by industry experts (who have excellent background in circuits, but not so much in optimization). For example, see http://archive.sigda.org/ispd/contests/10/ispd10cns.html. Of course, the current article on clock networks is missing material on optimization, but this can be fixed.

Igor Markov 04:20, 7 November 2011 (UTC) — Preceding unsigned comment added by Igor Markov (talk • contribs)

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dynamic logic

There is a statment: The 6800 has a minimum clock rate of 100 kHz while the 8080 can be halted. which is true, but misleading. The 8080 uses dynamic, and so also has a minimum clock frequency. It does have the ability to halt, and so stop executing instructions, even though the clock doesn't stop. The Z80, on the other hand, has static logic, and allows clock rates down to 0Hz. Also, processors with internal (PLL based) clock multipliers have a minimum rate for the PLL to lock, even if they use static logic. Should we have a section explaining dynamic logic? Gah4 (talk) 02:06, 26 October 2017 (UTC)[reply]

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